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  ltc6430-15 1 643015f typical a pplica t ion fea t ures descrip t ion high linearity differential rf/if amplifier/adc driver the lt c ? 6430-15 is a differential gain block amplifier designed to drive high resolution, high speed adcs with excellent linearity beyond 1000 mhz and with low associ- ated output noise. the ltc6430-15 operates from a single 5v power supply and consumes only 800mw. in its differential configuration, the ltc6430-15 can directly drive the differential inputs of an adc. using 1:2 baluns, the device makes an excellent 50 wideband balanced amplifier. while using 1:1.33 baluns, the device makes a high fidelity 50mhz to 1000mhz 75 catv amplifier. the ltc6430-15 is designed for ease of use, requiring a minimum of support components. the device is internally matched to 100 differential source/load impedance. on- chip bias and temperature compensation ensure consistent performance over environmental changes. the ltc6430-15 uses a high performance sige bicmos process for excellent repeatability compared with similar gaas amplifiers. all a- grade ltc6430-15 devices are tested and guaranteed for oip3 at 240 mhz. the ltc6430-15 is housed in a 4mm 4mm, 24-lead, qfn package with an exposed pad for thermal management and low inductance. for a single-ended 50 if gain block with similar perfor- mance, see the related ltc6431-15. . differential 16-bit adc driver oip3 vs frequency a pplica t ions n 50.0dbm oip3 at 240mhz into a 100 diff load n nf = 3.0db at 240mhz n 20mhz to 2000mhz bandwidth n 15.2db gain n a-grade 100% oip3 tested at 240mhz n 1.0nv/hz total input noise n s11 < C15db up to 1.2ghz n s22 < C15db up to 1.2ghz n >2.75v p-p linear output swing n p1db = 24.0dbm n insensitive to v cc variation n 100 differential gain-block operation n input/output internally matched to 100 diff n single 5v supply n dc power = 800mw n unconditionally stable n 4mm 4mm, 24-lead qfn package n differential adc driver n differential if amplifier n ofdm signal chain amplifier n 50 balanced if amplifier n 75 catv amplifier n 700mhz to 800mhz lt e amplifier l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 643015 ta01a v cm ltc6430-15 r source = 100 differential 50 v cc = 5v 5v r f chokes 1:2 balun filter r load = 100 differential adc frequency (mhz) 0 36 oip3 (dbm) 38 42 44 46 50 400 800 1000 40 48 200 600 1200 643015 ta01b v cc = 5v p out = 2dbm/ tone z in = z out = 100 diff. t a = 25c
ltc6430-15 2 643015f p in c on f igura t ion a bsolu t e maxi m u m r a t ings total supply voltage (v cc to gnd )........................... 5.5 v amplifier output current (+ out ) ......................... 105 ma amp lifier output current (C out ) ......................... 105 ma rf input power , continuous , 50 ( note 2) ........ +15 dbm rf input power , 100 s pulse , 50 ( note 2) ...... +20 dbm o perating temperature range (t case ) ... C40 c to 85 c s torage temperature range .................. C65 c to 150 c junction temperature (t j ) .................................... 150 c le ad temperature ( soldering , 10 sec ) ................... 300 c (note 1) 24 23 22 21 20 19 7 8 9 top view 25 gnd uf package 24-lead (4mm 4mm) plastic qfn 10 11 12 6 5 4 3 2 1 13 14 15 16 17 18 dnc dnc dnc dnc dnc dnc +out gnd t_diode dnc gnd ?out +in gnd v cc dnc dnc dnc ?in gnd v cc dnc dnc dnc t jmax = 150c, jc = 40c/w exposed pad (pin 25) is gnd, must be soldered to pcb o r d er i n f or m a t ion the lt c 6430-15 is available in two grades. the a-grade guarantees a minimum oip3 at 240mhz while the b-grade does not. lead free finish tape and reel part marking package description temperature range ltc6430aiuf-15#pbf ltc6430aiuf-15#trpbf 43015 24-lead (4mm 4mm) plastic qfn C40c to 85c ltc6430biuf-15#pbf ltc6430biuf-15#trpbf 43015 24-lead (4mm 4mm) plastic qfn C40c to 85c consult lt c marketing for parts specified with wider operating temperature ranges. consult lt c marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ d c e lec t rical c harac t eris t ics symbol parameter conditions min typ max units v s operating supply range 4.75 5.0 5.25 v i s,tot total supply current all v cc pins plus +out and Cout l 126 93 160 190 216 ma ma i s,out total supply current to out pins current to +out and Cout l 112 79 146 176 202 ma ma i vcc current to v cc pin either v cc pin may be used l 12 11 14 22 26 ma ma the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c, v cc = 5v, z source = z load = 100. typical measured dc electrical performance using test circuit a (note 3).
ltc6430-15 3 643015f ac e lec t rical c harac t eris t ics symbol parameter conditions min typ max units small signal bw C3db bandwidth de-embedded to package (low frequency cut-off, 20mhz) 2000 mhz s11 differential input match, 25mhz to 2000mhz de-embedded to package C10 db s21 forward differential power gain, 100mhz to 400mhz de-embedded to package 15.1 db s12 reverse differential isolation, 25mhz to 4000mhz de-embedded to package C19 db s22 differential output match, 25mhz to 1600mhz de-embedded to package C10 db frequency = 50mhz s21 differential power gain de-embedded to package 15.2 db oip3 output third-order intercept point p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade 46.6 45.6 dbm dbm im3 third-order intermodulation p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade C89.2 C87.2 dbc dbc hd2 second harmonic distortion p out = 8dbm C82.0 dbc hd3 third harmonic distortion p out = 8dbm C95.3 dbc p1db output 1db compression point 23.8 dbm nf noise figure de-embedded to package for balun input loss 3.0 db frequency = 140mhz s21 differential power gain de-embedded to package 15.1 db oip3 output third-order intercept point p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade 47.2 46.2 dbm dbm im3 third-order intermodulation p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade C90.4 C88.4 dbc dbc hd2 second harmonic distortion p out = 8dbm C82.6 dbc hd3 third harmonic distortion p out = 8dbm C94.7 dbc p1db output 1db compression point 23.8 dbm nf noise figure de-embedded to package for balun input loss 3.0 db frequency = 240mhz s21 differential power gain de-embedded to package l 14.5 14.3 15.1 16.5 16.5 db db oip3 output third-order intercept point p out = 2dbm/ tone , f = 8mhz, z o = 100 a- grade b- grade 47.0 50.0 47.0 dbm dbm im3 third-order intermodulation p out = 2dbm/ tone , f = 8mhz, z o = 100 a- grade b- grade C90.0 C96.0 C90.0 dbc dbc hd2 second harmonic distortion p out = 8dbm C80.5 dbc hd3 third harmonic distortion p out = 8dbm C87.0 dbc p1db output 1db compression point 24.1 dbm nf noise figure de-embedded to package for balun input loss 3.0 db the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c, v cc = 5v, z source = z load = 100, unless otherwise noted (note 3). measurements are performed using test circuit a, measuring from 50 sma to 50 sma without de-embedding (note 4).
ltc6430-15 4 643015f the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c, v cc = 5v, z source = z load = 100, unless otherwise noted (note 3). measurements are performed using test circuit a, measuring from 50 sma to 50 sma without de-embedding (note 4). ac e lec t rical c harac t eris t ics symbol parameter conditions min typ max units frequency = 300mhz s21 differential power gain de-embedded to package 15.1 db oip3 output third-order intercept point p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade 48.5 47.5 dbm dbm im3 third-order intermodulation p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade C93.0 C91.0 dbc dbc hd2 second harmonic distortion p out = 8dbm C76.9 dbc hd3 third harmonic distortion p out = 8dbm C84.4 dbc p1db output 1db compression point 23.7 dbm nf noise figure de-embedded to package for balun input loss 3.2 db frequency = 380mhz s21 differential power gain de-embedded to package 15.1 db oip3 output third-order intercept point p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade 47.5 46.5 dbm dbm im3 third-order intermodulation p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade C91.0 C89.0 dbc dbc hd2 second harmonic distortion p out = 8dbm C81.9 dbc hd3 third harmonic distortion p out = 8dbm C88.0 dbc p1db output 1db compression point 23.2 dbm nf noise figure de-embedded to package for balun input loss 3.2 db frequency = 500mhz s21 differential power gain de-embedded to package 15.0 db oip3 output third-order intercept point p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade 47.2 46.2 dbm dbm im3 third-order intermodulation p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade C90.4 C88.4 dbc dbc hd2 second harmonic distortion p out = 8dbm C79.0 dbc hd3 third harmonic distortion p out = 8dbm C90.0 dbc p1db output 1db compression point 23.4 dbm nf noise figure de-embedded to package for balun input loss 3.5 db frequency = 600mhz s21 differential power gain de-embedded to package 15.0 db oip3 output third-order intercept point p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade 46.5 45.5 dbm dbm im3 third-order intermodulation p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade C89.0 C87.0 dbc dbc hd2 second harmonic distortion p out = 8dbm C72.7 dbc hd3 third harmonic distortion p out = 8dbm C81.4 dbc p1db output 1db compression point 23.1 dbm nf noise figure de-embedded to package for balun input loss 3.5 db frequency = 700mhz s21 differential power gain de-embedded to package 14.9 db
ltc6430-15 5 643015f the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c, v cc = 5v, z source = z load = 100, unless otherwise noted (note 3). measurements are performed using test circuit a, measuring from 50 sma to 50 sma without de-embedding (note 4). symbol parameter conditions min typ max units oip3 output third-order intercept point p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade 45.3 44.3 dbm dbm im3 third-order intermodulation p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade C86.6 C84.6 dbc dbc hd2 second harmonic distortion p out = 8dbm C71.4 dbc hd3 third harmonic distortion p out = 8dbm C79.5 dbc p1db output 1db compression point 23.0 dbm nf noise figure de-embedded to package for balun input loss 3.8 db frequency = 800mhz s21 differential power gain de-embedded to package 14.8 db oip3 output third-order intercept point p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade 44.5 43.5 dbm dbm im3 third-order intermodulation p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade C85.0 C83.0 dbc dbc hd2 second harmonic distortion p out = 8dbm C71.2 dbc hd3 third harmonic distortion p out = 8dbm C76.7 dbc p1db output 1db compression point 22.6 dbm nf noise figure de-embedded to package for balun input loss 4.0 db frequency = 900mhz s21 differential power gain de-embedded to package 14.8 db oip3 output third-order intercept point p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade 43.7 42.7 dbm dbm im3 third-order intermodulation p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade C83.4 C81.4 dbc dbc hd2 second harmonic distortion p out = 8dbm C71.7 dbc hd3 third harmonic distortion p out = 8dbm C76.5 dbc p1db output 1db compression point 22.3 dbm nf noise figure de-embedded to package for balun input loss 4.2 db frequency = 1000mhz s21 differential power gain de-embedded to package 14.7 db oip3 output third-order intercept point p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade 43.5 42.5 dbm dbm im3 third-order intermodulation p out = 2dbm/ tone , f = 1mhz, z o = 100 a- grade b- grade C83.0 C81.0 dbc dbc hd2 second harmonic distortion p out = 8dbm C74.2 dbc hd3 third harmonic distortion p out = 8dbm C86.0 dbc p1db output 1db compression point 22.3 dbm nf noise figure de-embedded to package for balun input loss 4.2 db ac e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: guaranteed by design and characterization. this parameter is not tested. note 3: the ltc6430-15 is guaranteed functional over the case operating temperature range of C40c to 85c. note 4: small signal parameters s and noise are de-embedded to the package pins, while large signal parameters are measured directly from the test circuit.
ltc6430-15 6 643015f t a = 25c, v cc = 5v, z source = z load = 100, unless otherwise noted (note 3). measurements are performed using test circuit a, measuring from 50 sma to 50 sma without de-embedding (note 4). typical p er f or m ance c harac t eris t ics differential input match (s11 dd ) vs frequency over temperature differential gain (s21 dd ) vs frequency over temperature differential reverse isolation (s12 dd ) vs frequency over temperature differential output match (s22 dd ) vs frequency over temperature common mode gain (s21 cc ) vs frequency over temperature cm-dm gain (s21 dc ) vs frequency over temperature differential s parameters vs frequency differential stability factor k vs frequency over temperature noise figure vs frequency over temperature frequency (mhz) 0 ?30 mag (db) ?20 ?10 0 10 1000 2000 500 1500 2500 643015 g01 3000 20 ?25 ?15 ?5 5 15 25 s11 s21 s12 s22 frequency (mhz) stability factor k (unitless) 2 4 6 10000 2000 3000 4000 8 10 0 1 3 5 7 9 5000 643015 g02 100c 85c 60c 35c 25c 0c ?20c ?40c t case = frequency (mhz) 50 0 noise figure (db) 1 3 4 5 8 7 450 850 1050 2 6 250 650 1250 643015 g03 ?40c 25c 85c t case = frequency (mhz) 0 ?25 mag s11dd (db) ?20 ?15 ?10 ?5 0 500 1000 1500 2000 643015 g04 100c 85c 60c 35c 25c 0c ?20c ?40c t case = frequency (mhz) 0 mag s21dd (db) 500 1000 1500 2000 643015 g05 14 15 13 12 11 10 16 100c 85c 60c 35c 25c 0c ?20c ?40c t case = frequency (mhz) 0 mag s12dd (db) 500 1000 1500 2000 643015 g06 ?10 ?5 ?15 ?20 ?25 ?30 0 100c 85c 60c 35c 25c 0c ?20c ?40c t case = frequency (mhz) 0 ?30 ?25 mag s22dd (db) ?20 ?15 ?10 ?5 0 500 1000 1500 2000 643015 g07 100c 85c 60c 35c 25c 0c ?20c ?40c t case = 5 7 9 11 13 15 6 8 10 12 14 16 frequency (mhz) 0 mag s21cc (db) 500 1000 1500 2000 643015 g08 100c 85c 60c 35c 25c 0c ?20c ?40c t case = frequency (mhz) mag s21dc (db) ?40 ?30 ?20 500 0 1000 1500 ?10 0 ?50 ?45 ?35 ?25 ?15 ?5 2000 643015 g09 100c 85c 60c 35c 25c 0c ?20c ?40c t case =
ltc6430-15 7 643015f t a = 25c, v cc = 5v, z source = z load = 100, unless otherwise noted (note 3). measurements are performed using test circuit a, measuring from 50 sma to 50 sma without de-embedding (note 4). typical p er f or m ance c harac t eris t ics oip3 vs tone spacing over frequency oip3 vs frequency over temperature hd2 vs frequency over p out hd3 vs frequency over p out hd4 vs frequency over p out oip3 vs frequency oip3 vs rf power out/tone over frequency oip3 vs frequency over v cc voltage frequency (mhz) 0 36 oip3 (dbm) 38 42 44 46 50 400 800 1000 40 48 200 600 1200 643015 g10 v cc = 5v p out = 2dbm/ tone z in = z out = 100 diff. t a = 25c v cc = 5v z in = z out = 100 t a = 25c rf p out (dbm/tone) ?10 oip3 (dbm) 38 48 50 ?6 ?2 2 34 44 36 46 32 30 42 40 ?8 ?4 6 10 0 4 8 643015 g11 50mhz 100mhz 200mhz 300mhz 400mhz 600mhz 800mhz 1000mhz t case = frequency (mhz) 0 oip3 (dbm) 38 48 50 200 400 600 34 44 36 46 32 30 42 40 100 300 800 1000 500 700 900 v cc = 4.5v v cc = 4.75v v cc = 5v v cc = 5.25v 643015 g12 p out = 2dbm/tone z in = z out = 100 t a = 25c tone spacing (mhz) oip3 (dbm) 100 20 30 40 50 643015 g13 50mhz 100mhz 200mhz 300mhz 400mhz 600mhz 800mhz 1000mhz 44 49 50 51 42 47 43 48 41 40 46 45 v cc = 5v p out = 2dbm/tone z in = z out = 100 t a = 25c frequency (mhz) 0 oip3 (dbm) 40 55 200 400 600 30 35 25 20 50 45 100 300 800 1000 500 700 900 643015 g14 85c 60c 25c 0c ?20c ?30c ?40c t case = v sup = 5v p out = 2dbm/tone f space = 1mhz z in = z out = 100 frequency (mhz) 0 hd2 (dbc) 200 400 600 100 300 800 1000 500 700 900 643015 g15 ?30 ?20 ?10 ?40 ?50 ?80 ?90 ?60 0 ?70 p out = 6dbm p out = 8dbm p out = 10dbm v cc = 5v z in = z out = 100 t a = 25c frequency (mhz) 0 hd3 (dbc) 200 400 600 100 300 800 1000 500 700 900 643015 g16 ?30 ?20 ?10 ?40 ?50 ?80 ?100 ?90 ?60 0 ?70 p out = 6dbm p out = 8dbm p out = 10dbm v cc = 5v z in = z out = 100 t a = 25c frequency (mhz) 0 hd4 (dbc) 200 400 600 100 300 800 1000 500 700 900 643015 g17 ?50 ?40 ?30 ?60 ?70 ?100 ?110 ?80 ?90 p out = 6dbm p out = 8dbm p out = 10dbm v cc = 5v z in = z out = 100 noise floor limited
ltc6430-15 8 643015f t a = 25c, v cc = 5v, z source = z load = 100, unless otherwise noted (note 3). measurements are performed using test circuit a, measuring from 50 sma to 50 sma without de-embedding (note 4). typical p er f or m ance c harac t eris t ics total current vs rf input power total current (i tot ) vs case temperature p1db vs frequency total current (i tot ) vs v cc frequency (mhz) 0 p1db (dbm) 24 25 200 400 600 22 23 21 20 100 300 800 1000 500 700 900 643015 g19 v cc = 5v z in = z out = 100 t a = 25c v cc (v) 3 100 i tot (ma) 110 130 140 150 180 170 4 5 5.5 120 160 3.5 4.5 6 6.5 643015 g20 t case = 25c rf input power (dbm) ?15 total current (ma) 130 150 110 90 ?5 5 ?10 0 10 15 20 70 50 170 643015 g21 v cc = 5v t a = 25c case temperature (c) ?60 i tot (ma) 160 165 155 150 ?20 20 ?40 0 40 60 80 100 145 140 175 170 643015 g22 v cc = 5v output power vs input power over frequency input power (dbm) 2 output power (dbm) 4 6 8 3 5 10 12 7 9 11 643015 g18 22 23 24 21 20 17 15 16 19 25 18 100mhz, p1db = 23.8dbm 200mhz, p1db = 24.1dbm 400mhz, p1db = 23.5dbm 600mhz, p1db = 23.1dbm 800mhz, p1db = 22.6dbm 1000mhz, p1db = 22.3dbm
ltc6430-15 9 643015f p in func t ions gnd (pins 8, 14, 17, 23, exposed pad pin 25): ground. for best rf performance, all ground pins should be con- nected to the printed circuit board ground plane. the exposed pad (pin 25) should have multiple via holes to an underlying ground plane for low inductance and good thermal dissipation. +in (pin 24): positive signal input pin. this pin has an internally generated 2 v dc bias. a dc-blocking capacitor is required. see the applications information section for specific recommendations. Cin (pin 7): negative signal input pin. this pin has an internally generated 2 v dc bias. a dc-blocking capacitor is required. see the applications information section for specific recommendations. v cc (pins 9, 22): positive power supply. either or both v cc pins should be connected to the 5 v supply. bypass the v cc pin with 1000 pf and 0.1 f capacitors. the 1000pf capacitor should be physically close to a v cc pin. + out ( pin 18): positive amplifier output pin. a transformer with a center tap tied to v cc or a choke inductor tied to 5v supply is required to provide dc current and rf isolation. for best performance select a choke with low loss and high self resonant frequency ( srf). see the applications information section for more information. Cout ( pin 13): negative amplifier output pin. a trans- former with a center tap tied to v cc or a choke inductor is required to provide dc current and rf isolation. for best performance select a choke with low loss and high srf. dnc (pins 1 to 6, 10 to 12, 15, 19 to 21): do not connect. do not connect these pins, allow them to float. failure to float these pins may impair the performance of the ltc6430-15. t_diode (pin 16): optional. a diode which can be forward biased to ground with up to 1 ma of current. the measured voltage will be an indicator of the chip temperature. b lock diagra m 643015 bd v cc 9, 22 +in bias and temperature compensation 15db gain 15db gain gnd 8, 14, 17, 23 and paddle 25 24 ?in +out t_diode ? out 7 18 16 13
ltc6430-15 10 643015f o pera t ion the ltc6430-15 is a highly linear, fixed-gain amplifier for differential signals. it can be considered a pair of 50 single- ended devices operating 180 degrees apart. its core signal path consists of a single amplifier stage minimiz- ing stability issues. the input is a darlington pair for high input impedance and high current gain. additional circuit enhancements increase the output impedance commen- surate with the input impedance and minimize the effects of internal miller capacitance. the ltc6430-15 uses a classic rf gain block topology, with enhancements to achieve excellent linearity. shunt and series feedback elements are added to lower the input/ output impedance and match them simultaneously to the source and load. an internal bias controller optimizes the bias point for peak linearity over environmental changes. this circuit architecture provides low noise, good rf power handling capability and wide bandwidth; characteristics that are desirable for if signal-chain applications. figure 1. test circuit a tes t c ircui t a 643015 f01 v cc = 5v t1 1:2 port input rf out 50, sma rf in 50, sma port output balun_a balun_a balun_a = adt2-it for 50mhz to 300mhz balun_a = adt2-1p for 300mhz to 400mhz balun_a = adtl2-18 for 400mhz to 1000mhz all are mini-circuits cd542 footprint c1 1000pf l1 560nh ltc6430-15 dnc dnc dnc dnc dnc dnc +out gnd t_diode dnc gnd ?out +in gnd v cc dnc dnc dnc ?in gnd v cc dnc dnc dnc ?? c2 1000pf c4 1000pf c3 1000pf c7 60pf c5 1nf r1 350 c6 0.1f c8 60pf r2 350 l2 560nh t2 2:1 differential application test circuit a (balanced amp)
ltc6430-15 11 643015f a pplica t ions i n f or m a t ion the ltc6430-15 is a highly linear fixed-gain amplifier which is designed for ease of use. both the input and output are internally matched to 100 differential source and load impedance from 20mhz to 1700 mhz. biasing and temperature compensation are also handled internally to deliver optimized performance. the designer need only supply input/output blocking capacitors, rf chokes and decoupling capacitors for the 5 v supply. however, because the device is capable of such wideband operation, a single application circuit will probably not result in optimized performance across the full frequency band. differential circuits minimize the common mode noise and 2 nd harmonic distortion issues that plague many designs. additionally, the ltc6430s differential topol- ogy matches well with the differential inputs of an adc. however, evaluation of these differential circuits is dif- ficult, as high resolution, high frequency, differential test equipment is lacking. our test circuit is designed for evaluation with standard single ended 50 test equipment. therefore, 1:2 balun transformers have been added to the input and output to transform the ltc6430-15s 100 differential source / load impedance to 50 single-ended impedance compatible with most test equipment. other than the balun, the evaluation circuit requires a minimum of external components. input and output dc- blocking capacitors are required as this device is internally biased for optimal operation. a frequency appropriate choke and de-coupling capacitors provide dc bias to the rf out nodes . only a single 5 v supply is necessary to either of the v cc pins on the device. both v cc pins are connected inside the package. tw o v cc pins are provided for the convenience of supply routing on the pcb. an op- tional parallel 60pf, 350 input network has been added to ensure low frequency stability. the particular element values shown in test circuit a are chosen for wide bandwidth operation. depending on the desired frequency, performance may be improved by custom selection of these supporting components. choosing the right rf choke not all choke inductors are created equal. it is always im- portant to select an inductor with low r loss as resistance will drop the available voltage to the device. also look for an inductor with high self resonant frequency ( srf) as this will limit the upper frequency where the choke is useful. above the srf, the parasitic capacitance dominates and the chokes impedance will drop. for these reasons, wire- wound inductors are preferred, while multilayer ceramic chip inductors should be avoided for an rf choke if pos- sible. since the ltc6430-15 is capable of such wideband operation, a single choke value will not result in optimized performance across its full frequency band. table 1 lists common frequency bands and suggested corresponding inductor values. table 1. target frequency and suggested inductor value frequency band (mhz) inductor value (nh) srf (mhz) model number manufacturer 20 to 100 1500nh 100 0603ls coilcraft www. coilcraft. com 100 to 500 560nh 525 0603ls 500 t o 1000 100nh 1150 0603ls 1000 to 2000 51nh 1400 0603ls dc-blocking capacitor the role of a dc-blocking capacitor is straightforward: block the path of dc current and allow a low series imped- ance path for the ac signal. lower frequencies require a higher value of dc- blocking capacitance. generally , 1000pf to 10,000 pf will suffice for operation down to 20mhz. the ltc6430-15 linearity is insensitive to the choice of blocking capacitor. rf bypass capacitor rf bypass capacitors act to shunt the ac signals to ground with a low impedance path. they prevent the ac signal from getting into the dc bias supply. it is best to place the bypass capacitor as close as possible to the dc supply pins of the amplifier. any extra distance translates into additional series inductance which lowers the effec- tiveness of the bypass capacitor network. the suggested bypass capacitor network consists of two capacitors: a low value 1000 pf capacitor to shunt high frequencies
ltc6430-15 12 643015f and a larger 0.1 f capacitor to handle lower frequencies. use ceramic capacitors of appropriate physical size for each capacitance value (e.g., 0402 for the 1000pf, 0805 for the 0.1 f) to minimize the equivalent series resistance (esr) of the capacitor. low frequency stability most rf gain blocks suffer from low frequency instabil- ity. to avoid stability issues, the ltc6430-15, contains an internal feedback network that lowers the gain and matches the input and output impedance of the intrinsic amplifier. this feedback network contains a series capaci- tor, whose value is limited by physical size. so, at some low frequencies, this feedback capacitor looks like an open circuit; the feedback fails, gain increases and gross imped- ance mismatches occur which can create instability. this situation is easily resolved with a parallel capacitor and a resistor network on the input. this is shown in figure 1. this network provides resistive loss at low frequencies and is bypassed by the capacitor at the desired band of operation. however, if the ltc6430-15 is preceded by a low frequency termination, such as a choke or balun transformer, the input stability network is not required. a choke at the output can also terminate low frequencies out-of-band and stabilize the device. exposed pad and ground plane considerations as with any rf device, minimizing the ground inductance is critical. care should be taken with pc board layouts using exposed pad packages, as the exposed pad provides the lowest inductive path to ground. the maximum allowable number of minimum diameter via holes should be placed underneath the exposed pad and connected to as many ground plane layers as possible. this will provide good rf ground and low thermal impedance. maximizing the copper ground plane at the signal and microstrip ground will also improve the heat spreading and lower inductance. it is a good idea to cover the via holes with solder mask on the backside of the pcb to prevent the solder from wicking away from the critical pcb to exposed pad interface. one to two ounces of copper plating is suggested to improve heat spreading from the device. frequency limitations the ltc6430-15 is a wide bandwidth amplifier but it is not intended for operation down to dc. the lower frequency cutoff is limited by on-chip matching elements. the cutoff may be arbitrarily pushed lower with off chip elements; however, the translation between the low fixed dc com- mon mode input voltage and the higher open collector dc common mode output bias point make dc-coupled operation impractical. test circuit a test circuit a, shown in figure 1, is designed to allow for the evaluation of the ltc6430-15 with standard single- ended 50 test equipment. this allows the designer to verify the performance when the device is operated dif- ferentially. this evaluation circuit requires a minimum of external components. since the ltc6430-15 operates over a very wide band, the evaluation test circuit is optimized for wideband operation. obviously, for narrowband operation, the circuit can be further optimized. input and output dc-blocking capacitors are required, as this device is internally dc biased for optimal performance . a frequency appropriate choke and decoupling capacitors are required to provide dc bias to the rf output nodes (+out and C out). a 5 v supply should also be applied to one of the v cc pins on the device. components for a suggested parallel 60 pf , 350 stabil- ity network have been added to ensure low frequency stability. the 60pf capacitance can be increased to improve low frequency (<150 mhz) performance, however the designer needs to be sure that the impedance presented at low frequency will not create an instability. a pplica t ions i n f or m a t ion
ltc6430-15 13 643015f a pplica t ions i n f or m a t ion balanced amplifier circuit, 50 input and 50 output this balanced amplifier circuit is a replica of the test circuit a . it is useful for single- ended 50 amplifier require- ments and is surprisingly wideband. using this balanced arrangement and the frequency appropriate baluns, one can achieve the intermodulation and harmonic performance listed in the ac electrical characteristics specifications of this data sheet. besides its impressive intermodula- tion performance, the ltc6430-15 has impressive 2nd harmonic suppression as well. this makes it particularly well suited for multioctave applications where the 2nd harmonic cannot be filtered. this balanced circuit example uses two mini-circuits 1:2 baluns. the baluns were chosen for their bandwidth and frequency options that utilize the same package footprint (see table 2). a pair of these baluns, back-to-back has less than 1.5 db of loss, so the penalty for this level of performance is minimal. any suitable 1:2 balun may be used to create a balanced amplifier with the ltc6430-15. the optional stability network is only required when the baluns bandwidth reaches below 20 mhz. it is included in the circuit as a comprehensive protection for any passive element placed at the ltc6430-15 input. its performance degradation at low frequencies can be mitigated by increas - ing the 60pf capacitors value. demo boards 1774 a-a and 1774 a-b implement this balanced amplifier circuit. it is shown in figure 18 and figure 19. please note that a number of dnc pins are connected on the evaluation board. these connections are not necessary for normal circuit operation. the evaluation board also includes an optional back to back pair of baluns so that their losses may be measured. this allows the designer to de-embed the balun losses and more accurately predict the ltc6430-15 performance in a differential circuit. table 2. target frequency and suggested 2:1 balun frequency band (mhz) model number manufacturer 50 to 300 adt2-1t mini-circuits www.minicircuits.com 300 to 400 adt2-1p 400 to 1300 adtl2-18 figure 2. balanced amplifier circuit, 50 input and 50 output 643015 f02 v cc = 5v t1 1:2 port input rf out 50, sma rf in 50, sma port output balun_a balun_a balun_a = adt2-1t for 50mhz to 300mhz balun_a = adt2-1p for 300mhz to 400mhz balun_a = adtl2-18 for 400mhz to 1300mhz all are mini-circuits cd542 footprint c1 1000pf l1 560nh ltc6430-15 dnc dnc dnc dnc dnc dnc +out gnd t_diode dnc gnd ?out +in gnd v cc dnc dnc dnc ?in gnd v cc dnc dnc dnc ?? c2 1000pf c4 1000pf c3 1000pf c7 60pf c5 1000pf r1 350 c6 0.1f c8 60pf optional stability network r2 350 100 differential 100 differential l2 560nh t2 2:1
ltc6430-15 14 643015f driving the ltc2158, 14-bit, 310msps adc with 1.25ghz of bandwidth boasting high linearity, low associated noise and wide bandwidth, the ltc6430-15 is well suited to drive high speed, high resolution adcs with over a ghz of input bandwidth. to demonstrate its performance, the ltc6430- 15 was used to drive an ltc2158 14-bit, 310 msps adc with 1.25 ghz of input bandwidth in an undersampling application. typically, a filter is used between the adc driver amplifier and adc input to minimize the noise contribution from the amplifier. however, with the typical snr of higher sample rate adcs, the ltc6430-15 can drive them without any intervening filter, and with very little penalty in snr. this system approach has the added benefit of allowing over two octaves of usable frequency range. the ltc6430-15 driving the ltc2158, as shown in the circuit in figure 3, with band limiting provided only by the 1.25ghz input bw of the adc, still produces 64.4db snr, and offers im performance that varies little from 300 mhz to 1 ghz. at the lower end of this frequency range, the im contribution of the adc and amplifier are comparable, and the third-order im products may be ad- ditive, or may see cancelation. at 1 ghz input, the adc is dominant in terms of im and noise contribution, limited by internal clock jitter and high input signal amplitude. tab le 3 shows noise and linearity performance. example outputs at 380 mhz and 1000 mhz are shown in figure 5, figure 6, figure 7, figure 8 and figure 9. as a final display of the utility of this ltc6430-15/ltc2158 combination with real world signals, figure 9 shows a wideband code division multiple access ( wcdma) signal was introduced to the ltc6430-15/ltc2158 combination at 830 mhz. the output indicates an acpr near 60 db cal- culated from the adjacent power on the upper side where the filter stop band suppresses the contribution from the generator. please note that the adjacent channels on the lower side are not suppressed as they are within the passband of the filter. the ltc6430-15 can directly drive the high speed adc inputs and settles quickly. most feedback amplifiers require protection from the sampling disturbances, the mixing products that result from direct sampling. this is in part due to the fact that unless the adc input driving circuitry offers settling in less than one-half clock cycle, the adc may not exhibit the expected linearity. if the adc samples the recover y process of an amplifier it will be seen as distortion. if an amplifier exhibits envelope detection in a pplica t ions i n f or m a t ion table 3. ltc6430-15 and ltc2158 combined performance frequency (mhz) sample rate (msps) im3 (low, hi) (dbfs) hd3 (3rd harmonic) (dbc) sfdr (db) snr (db) 380 310 (C98, C105) C80.2 68.7 61.8 533 307.2 C82.2 79.3 59.4 656 291.8 (C94, C92) 690 307.2 (C93, C92) C80.8 70.5 58.2 842 307.2 C78 66.7 57.1 1000 307.2 (C83,C83) C89.7 69.3 56.0
ltc6430-15 15 643015f figure 3. wideband adc driver, ltc6430-15 directly driving the ltc2158 adc figure 4. wideband adc driver, ltc6430-15 directly driving the ltc2158 adcalternative using mini circuits 2:1 balun a pplica t ions i n f or m a t ion the presence of multi ghz mixing products, it will distort. a band limiting filter would provide suppression from those products beyond the capability of the amplifier, as well as limit the noise bandwidth, however the settling of the filter can be an issue. the ltc2158, at 310 msps only allows 1.5 ns settling time for any driver that is disturbed by these transients. this approach of removing the filter between the adc and driver amplifier offers many advantages. it opens the opportunity to precede the amplifier with switchable bandpass filters, without any need to change the critical network between the drive amplifier and adc. the trans- mission line distances shown in the schematic are part of the design, and are devised such that there are no impedance discontinuities, and therefore no reflections, in the distances between 75 ps to 200 ps from the adc. end termination can be immediately prior to, or preferably after the adc, and the amplifier should either be within the 75 ps inner boundary, or outside the 200 ps distance. similarly, any shunt capacitor or resonator, including the large pads required by some inductors with more than a small fraction of 1 pf, incorporated into a filter, should not be in this range of distances from the adc where reflec- tions will impair performance. transformers with large v cc = 5v v cm 350 643015 f03 49.9 560nh 0402af 100nh 0402cs 150 1nf 1nf guanella balun ma/com etc1-1-13 60pf 5v ltc6430-15 ltc2158 ? ? 200ps v cc = 5v v cm 350 643015 f04 49.9 560nh 0402af 100nh 0402cs 1nf 1nf mini-circuits adtl2-18 2:1 balun 60pf 5v ltc6430-15 ltc2158 ? ? 200ps
ltc6430-15 16 643015f a pplica t ions i n f or m a t ion figure 5. adc output: 1-tone test at 380mhz with 310msps sampling rate undersampled in the third nyquist zone pads should be avoided within these distances. a 100 nh shunt inductor at the adc input approximates the complex conjugate of the adc sampling circuit, and in doing so, improves power transfer and suppresses the low frequency difference products produced by direct sampling adcs. if the entire frequency range from 300 mhz to 1 ghz were of interest, a 100nh inductor at the input is acceptable, but if interest is only in higher frequencies, performance would be better if the input inductor is reduced in value. if lower frequencies are of interest, a higher value up to some 200 nh may be practical, but beyond that range the srf of the inductor becomes an issue. as this inductor is placed at different distances either before or after the adc inputs, the optimal value may change. in all cases, it should be within 50 ps of the adc inputs. end termination may be more than 200 ps distant if after the adc. if the end termination were perfect, it could be at any distance after the adc. to terminate the input path after the adc, place the termination resistors on the back of the pcb. if the input signal path is buried or on the back of the pcb, termination resistors should be placed on the top of the pcb to properly terminate after the adc. although the adc is isolated by a driver amplifier, care must be taken when filtering at the amplifier input. much like mesfets, high frequency mixing products are handled well by the ltc6430. however, if there is no band limiting after the ltc6430, these mixing products, reduced by reverse isolation but subsequently reflected from a filter prior to the ltc6430 and reamplified, can cause distor- tion. in such cases, the network will then be sensitive to transmission line lengths and impedance characteristics of the filter prior to the ltc6430. diplexers or absorptive filters can produce more robust results. an absorptive filter or diplexer-like structure after the amplifier reduces the sensitivity to the network prior to the amplifier, but the same constraints previously outlined apply to the filter.
ltc6430-15 17 643015f a pplica t ions i n f or m a t ion figure 6. adc output: 2-tone test at 380mhz with 310msps sampling rate undersampled in the third nyquist zone figure 7. adc output: 1-tone test at 1000mhz with 307.2msps sampling rate undersampled in the seventh nyquist zone
ltc6430-15 18 643015f a pplica t ions i n f or m a t ion figure 9. adc output: wcdma test at 830mhz if using 30mhz wide diplexer prior to the ltc6430-15 figure 8. adc output: 2-tone test at 1000mhz with 307.2msps sampling rate undersampled in the seventh nyquist zone
ltc6430-15 19 643015f 50mhz to 1000mhz c atv push-pull amplifier: 75 input and 75 output wide bandwidth, excellent linearity and low output noise makes the ltc6430-15 an exceptional candidate for catv amplifier applications. as expected, the ltc6430-15 works well in a push-pull circuit to cover the entire 40 mhz to 1000mhz catv band . using readily available smt baluns, the ltc6430-15 of- fers high linearity and low noise across the whole catv band. remarkably, this performance is achieved with only 800 mw of power at 5 v. its low power dissipation greatly reduces the heat sinking requirements relative to traditional block catv amplifiers. the native ltc6430-15 device is well matched to 100 differential impedance at both the input and the output . therefore, we can employ 1:1.33 surface mount ( smt) baluns to transform its native 100 impedance to the standard 75 catv impedance, while retaining all the exceptional characteristics of the ltc6430-15. in addition, the baluns excellent phase balance and the 2 nd order linearity of the ltc6430-15 combine to further suppress 2nd order products across the entire catv band. as with any wide bandwidth application, care must be taken when figure 10. catv amplifier: 75 input and 75 output selecting a choke. an smt wire wound ferrite core inductor was chosen for its low series resistance, high self reso- nant frequency ( srf) and compact size. an input stability network is not required for this application as the balun presents a low impedance to the ltc6430-15s input at low frequencies. our resulting push-pull catv amplifier circuit is simple, compact, completely smt and extremely power efficient. the ltc6430-15 push-pull circuit has 14.1 db of gain with 0.4db of flatness across the entire 50 mhz to 1000mhz band. it sports an oip3 of 46 dbm and a noise figure of only 4.5 db. the ctb and cso measurements have not been taken as of this writing. these characteristics make the ltc6430-15 an ideal amplifier for head-end cable modem applications or catv distribution amplifiers. the circuit is shown in figure 10, with 75 f connectors at both input and output. the evaluation board may be loaded with either 75 f con- nectors, or 75 bnc connectors, depending on the users preference. please note that the use of substandard con- nectors can limit usable bandwidth of the circuit. 643015 f10 v cc = 5v t1 1:1.33 port input rf out 75, connector rf in 75, connector port output balun_a balun_a balun_a = tc1.33-282+ for 50mhz to 1000mhz mini-circuits 1:1.33 balun c1 0.047f l1 560nh ltc6430-15 dnc dnc dnc dnc dnc dnc +out gnd t_diode dnc gnd ?out +in gnd v cc dnc dnc dnc ?in gnd v cc dnc dnc dnc ?? c2 0.047f c4 0.047f c3 0.047f c5 1000pf c6 0.1f 100 differential 100 differential l2 560nh t2 1.33:1 a pplica t ions i n f or m a t ion
ltc6430-15 20 643015f 50mhz to 1000mhz c atv push-pull amplifier: 75 input and 75 output a pplica t ions i n f or m a t ion figure 11. c atv circuit, input and output return loss vs frequency figure 12. c atv amplifier circuit, gain (s21) vs frequency figure 13. c atv amplifier circuit, noise figure vs frequency frequency (mhz) 0 ?30 mag (db) ?25 ?20 ?15 ?10 0 200 400 600 800 1000 1200 ?5 s11 643015 f11 s22 frequency (mhz) 0 mag (db) 200 400 600 800 1000 1200 643015 f12 0 4 2 14 8 10 12 6 1 5 3 15 9 11 13 7 s21 frequency (mhz) 0 0 noise figure (db) 2 4 6 8 10 200 400 600 800 1000 1200 643015 f13 v cc = 5v, t = 25c includes balun loss figure 14. c atv amplifier circuit, oip3 vs frequency figure 15. hd2 and hd3 products vs frequency frequency (mhz) 0 oip3 (dbm) 200 400 600 800 1000 643015 f14 42 46 50 38 34 30 26 54 v cc = 5v, t = 25c p out = 2dbm/tone frequency (mhz) 0 hd2 and hd3 (dbc) 200 400 600 800 1000 643015 f15 v cc = 5v, t = 25c p out = 8dbm/tone ?70 ?20 ?10 0 ?90 ?40 ?80 ?30 ?100 ?110 ?50 ?60 hd2 avg hd3 avg
ltc6430-15 21 643015f 50mhz to 1000mhz c atv push-pull amplifier: 75 input and 75 output a pplica t ions i n f or m a t ion figure 16. ltc6430-15 c atv circuit schematic figure 17. ltc6430-15 c atv evaluation board 5 5 4 4 3 3 2 2 1 1 d d c c b b a a 1. all resistors are in ohms, 0402. all capacitors are 0402. note: unless otherwise specified +5v +in out mini circuit mini circuit l1=l2=560nh=coilcraft, part#:0603ls-561xjlb john c. 1st prototype 1 06-26-12 __ revision history description date approved eco rev 1 thursday, september 06, 2012 11 catv amplifier ak. john c. n/a ltc6430iuf-15 demo circuit 2032a size date: ic no. rev. sheet of title: approvals pcb des. app eng. technology fax: (408)434-0507 milpitas, ca 95035 phone: (408)432-1900 1630 mccarthy blvd. ltc confidential-for customer use only customer notice linear technology has made a best effort to design a circuit that meets customer-supplied specifications; however, it remains the customer's responsibility to verify proper and reliable operation in the actual application. component substitution and printed circuit board layout may significantly affect ci rcuit performance or reliability. contact linear technology applications engineering for assistance. this circuit is proprietary to linear technology and schematic supplied for use with linear technology parts. scale = none www.linear.com vcc vcc vcc vcc c12 1000pf 0603 j1 con-rf-75 ohm c11 0.1uf 0603 r3 opt 0 l1 560nh c9 0.1uf 0603 c8 0.047uf c10 1000pf 0603 j2 con-rf-75 ohm c19 opt c20 opt e6 t3 tc1.33-282+ 6 4 1 3 c5 1000pf c6 1000pf t4 tc1.33-282+ 6 4 1 3 l2 560nh c7 0.047uf c1 0.047uf c2 0.047uf u1 ltc6430iuf-15 2 14 1 24 4 6 8 10 21 19 17 22 20 18 16 5 9 11 15 12 13 3 23 7 25 dnc gnd dnc +in dnc dnc gnd dnc dnc dnc gnd vcc dnc +out t_diode dnc vcc dnc dnc dnc -out dnc gnd -in gnd
ltc6430-15 22 643015f a pplica t ions i n f or m a t ion figure 18. demo board 1774a schematic 5 5 4 4 3 3 2 2 1 1 d d c c b b a a 1. all resistors are in ohms, 0402. all capacitors are 0402. note: unless otherwise specified cal in cal out gnd +5v optional circuit -c opt 100-300 mhz -a freq. 100-1200 mhz 400-1000 mhz ltc6430iuf-15 assy u1 adt2-1t+ ltc6431iuf-15 t3, t4 -b adtl2-18 * 0 ohm opt r13,r14,r17,r18 opt r3, r4 0 ohm 0 ohm opt ltc6430iuf-15 j8 stuff stuff opt 1008 1008 +in -in +out -out j10 opt stuff opt 560nh opt opt 0.1uf c23 0.1uf c14,c15 1000pf, 0402 l2 opt opt -c opt 1000pf, 0603 -a c5 1000pf, 0603 1000pf, 0402 assy c2,c4 62pf opt c9 -b 62pf r1 348 opt 348 1000pf, 0402 560nh opt john c. production 2 12-13-11 __ revision history description date approved eco rev 1 wednesday, july 11, 2012 11 if amp/adc driver kim t. john c. n/a ltc643xiuf family demo circuit 1774a size date: ic no. rev. sheet of title: approvals pcb des. app eng. technology fax: (408)434-0507 milpitas, ca 95035 phone: (408)432-1900 1630 mccarthy blvd. ltc confidential-for customer use only customer notice linear technology has made a best effort to design a circuit that meets customer-supplied specifications; however, it remains the customer's responsibility to verify proper and reliable operation in the actual application. component substitution and printed circuit board layout may significantly affect ci rcuit performance or reliability. contact linear technology applications engineering for assistance. this circuit is proprietary to linear technology and schematic supplied for use with linear technology parts. scale = none www.linear.com vcc vcc vcc vcc c5 1000pf j7 sma-r r5 348 c23 0.1uf c11 1000pf l1 560nh c13 1000pf c18 1000pf r17 * 0603 c4 1000pf r14 * 0603 c14 1000pf l11 opt r13 * 0603 j9 sma-r opt c9 62pf c21 1000pf t4 * 6 4 1 5 3 j11 +5v c2 1000pf l22 opt c19 1000pf r2 348 e6 c16 1000pf r18 * 0603 j5 sma-r j8 sma-r * t1 see bom 6 4 1 5 3 c8 62pf c22 0.1uf c17 1000pf j6 sma-r c10 62pf r4 * 0603 c12 62pf c15 1000pf r1 348 e3 t2 see bom 6 4 1 5 3 u1 * 2 14 1 24 4 6 8 10 21 19 17 22 20 18 16 5 25 9 11 15 12 13 3 23 7 dnc gnd dnc +in dnc dnc gnd dnc dnc dnc gnd vcc dnc +out t_diode dnc gnd vcc dnc dnc dnc -out dnc gnd -in r3 * 0603 c1 1000pf j18 gnd r6 348 j10 sma-r * t3 * 6 4 1 5 3 c7 1000pf c20 1000pf l2 560nh c3 1000pf
ltc6430-15 23 643015f a pplica t ions i n f or m a t ion figure 19. demo board 1774a pcb
ltc6430-15 24 643015f di ff eren t ial s p ara m e t ers 5v, z diff = 100, t = 25c, de-embedded to package pins, dd: differential in to differential out frequency (mhz) s11 dd (mag) s11 dd (ph) s21 dd (mag) s21 dd (ph) s12 dd (mag) s12 dd (ph) s22 dd (mag) s22 dd (ph) gtu (max) stability (k) 23.5 C14.79 C83.75 15.59 166.68 C18.75 9.35 C14.74 C66.63 15.88 0.99 83.5 C22.74 C107.27 15.16 170.23 C18.67 C3.01 C22.99 C48.57 15.21 1.07 143 C23.62 C121.45 15.14 167.23 C18.74 C8.44 C24.91 C37.10 15.18 1.08 203 C23.66 C133.07 15.13 163.30 C18.81 C12.91 C25.64 C33.28 15.16 1.08 263 C22.92 C142.28 15.11 159.19 C18.85 C17.06 C26.20 C29.50 15.15 1.08 323 C22.64 C151.62 15.09 154.85 C18.93 C21.05 C26.12 C31.14 15.13 1.09 383 C21.56 C157.35 15.06 150.64 C18.97 C25.11 C25.59 C33.23 15.11 1.09 443 C20.69 C162.14 15.04 146.31 C19.05 C29.05 C24.66 C32.63 15.09 1.09 503 C19.70 C166.01 15.00 142.01 C19.12 C32.90 C23.61 C32.94 15.07 1.10 563 C18.85 C170.61 14.98 137.67 C19.21 C36.89 C22.75 C33.85 15.06 1.10 623 C18.10 C175.10 14.94 133.32 C19.28 C40.59 C21.89 C36.24 15.04 1.10 683 C17.59 C179.62 14.91 128.98 C19.37 C44.51 C21.10 C40.64 15.02 1.10 743 C17.07 176.30 14.88 124.59 C19.46 C48.37 C20.20 C45.87 15.01 1.10 803 C16.67 171.92 14.82 120.28 C19.57 C52.05 C19.19 C50.45 14.97 1.11 863 C16.24 168.04 14.80 115.83 C19.67 C56.02 C18.27 C55.85 14.97 1.11 923 C15.80 163.82 14.75 111.55 C19.82 C59.92 C17.40 C60.20 14.94 1.11 983 C15.42 160.15 14.72 107.07 C19.95 C63.56 C16.63 C65.14 14.94 1.12 1040 C15.03 156.56 14.67 102.65 C20.06 C67.32 C15.88 C70.73 14.92 1.12 1100 C14.74 153.02 14.62 98.25 C20.21 C71.16 C15.22 C76.33 14.91 1.12 1160 C14.47 149.97 14.59 93.56 C20.36 C74.78 C14.53 C82.33 14.90 1.13 1220 C14.22 147.29 14.52 89.20 C20.49 C78.43 C13.84 C88.47 14.87 1.13 1280 C13.96 144.60 14.50 84.43 C20.64 C82.16 C13.21 C94.61 14.89 1.13 1340 C13.71 142.54 14.40 79.82 C20.82 C85.95 C12.56 C100.71 14.84 1.14 1400 C13.46 140.50 14.36 75.06 C20.97 C89.58 C11.95 C106.83 14.84 1.14 1460 C13.21 138.25 14.25 70.23 C21.14 C93.14 C11.38 C113.18 14.79 1.14 1520 C12.93 136.52 14.12 65.45 C21.31 C96.91 C10.84 C119.34 14.72 1.15 1580 C12.69 134.85 14.00 60.83 C21.46 C100.58 C10.38 C125.57 14.65 1.16 1640 C12.44 132.91 13.83 55.62 C21.67 C104.18 C9.88 C131.85 14.56 1.17 1700 C12.08 130.90 13.61 51.75 C21.85 C107.65 C9.44 C138.66 14.41 1.18 1760 C11.83 128.75 13.48 46.46 C22.08 C111.59 C9.05 C145.10 14.35 1.20 1820 C11.59 126.05 13.15 42.83 C22.27 C114.99 C8.66 C151.89 14.10 1.23 1880 C11.26 123.96 13.04 38.17 C22.43 C118.70 C8.39 C158.77 14.05 1.23 1940 C11.04 121.35 12.74 34.51 C22.77 C122.54 C8.09 C165.44 13.83 1.28 2000 C10.77 118.82 12.52 30.70 C22.94 C125.55 C7.86 C172.29 13.67 1.31 2060 C10.50 116.06 12.44 27.13 C23.20 C129.50 C7.71 C178.95 13.66 1.33 2120 C10.25 113.21 12.13 23.32 C23.47 C132.67 C7.50 174.30 13.41 1.38 2180 C9.95 110.44 12.17 20.08 C23.67 C136.37 C7.38 167.79 13.51 1.38 2240 C9.66 107.44 11.95 15.44 C23.98 C139.65 C7.21 161.17 13.37 1.42 2300 C9.43 103.84 11.86 11.58 C24.24 C143.03 C7.10 154.86 13.33 1.45
ltc6430-15 25 643015f 50 input/output balanced amplifier typical a pplica t ions 16-bit adc driver 643015 ta03 v cc = 5v t1 1:2 port input 14- to 16-bit adc rf in 50, sma lowpass filter +in ?in balun_a c1 1000pf l1 220nh ltc6430-15 dnc dnc dnc dnc dnc dnc +out gnd t_diode dnc gnd ?out +in gnd v cc dnc dnc dnc ?in gnd v cc dnc dnc dnc ?? c2 1000pf c4 1000pf c3 1000pf c5 1000pf c6 0.1f 100 differential l2 220nh etc1-1-13 1:1 transformer m/a-com balun_a = adt2-1t for 50mhz to 300mhz balun_a = adt2-1p for 300mhz to 400mhz balun_a = adtl2-18 for 400mhz to 1300mhz all are mini-circuits cd542 footprint 643015 ta02 v cc = 5v t1 1:2 port input rf out 50, sma rf in 50, sma port output balun_a balun_a balun_a = adt2-1t for 50mhz to 300mhz balun_a = adt2-1p for 300mhz to 400mhz balun_a = adtl2-18 for 400mhz to 1300mhz all are mini-circuits cd542 footprint c1 1000pf l1 560nh ltc6430-15 dnc dnc dnc dnc dnc dnc +out gnd t_diode dnc gnd ?out +in gnd v cc dnc dnc dnc ?in gnd v cc dnc dnc dnc ?? c2 1000pf c4 1000pf c3 1000pf c7 60pf c5 1000pf r1 350 c6 0.1f c8 60pf optional stability network r2 350 100 differential 100 differential l2 560nh t2 2:1
ltc6430-15 26 643015f typical a pplica t ions 75 50mhz to 1000mhz c atv amplifier 643015 ta04 v cc = 5v t1 1:1.33 port input rf out 75, connector rf in 75, connector port output balun_a balun_a balun_a = tc1.33-282+ for 50mhz to 1000mhz mini-circuits 1:1.33 c1 0.047f l1 560nh ltc6430-15 dnc dnc dnc dnc dnc dnc +out gnd t_diode dnc gnd ?out +in gnd v cc dnc dnc dnc ?in gnd v cc dnc dnc dnc ?? c2 0.047f c4 0.047f c3 0.047f c5 1000pf c6 0.1f 100 differential 100 differential l2 560nh t2 1.33:1
ltc6430-15 27 643015f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 4.00 0.10 (4 sides) note: 1. drawing proposed to be made a jedec package outline mo-220 variation (wggd-x)?to be approved 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side, if present 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 2423 1 2 bottom view?exposed pad 2.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (uf24) qfn 0105 rev b recommended solder pad pitch and dimensions 0.70 0.05 0.25 0.05 0.50 bsc 2.45 0.05 (4 sides) 3.10 0.05 4.50 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer uf package 24-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1697 rev b) p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings.
ltc6430-15 28 643015f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2012 lt 1212 ? printed in usa r ela t e d p ar t s typical a pplica t ion part number description comments fixed gain if amplifiers/adc drivers ltc6431-15 50 gain block if amplifier single-ended version of ltc6431-15, 15.5db gain, 47dbm oip3 at 240mhz into a 50 load ltc6417 1.6ghz low noise high linearity differential buffer/ adc driver oip3 = 41dbm at 300mhz, can drive 50w differential output high speed voltage clamping protects subsequent circuitry ltc6400-8/ltc6400-14/ ltc6400-20/ltc6400-26 1.8ghz low noise, low distortion differential adc drivers C71dbc im3 at 240mhz 2v p-p composite, i s = 90ma, a v = 8db, 14db, 20db, 26db ltc6401-8/ltc6401-14/ ltc6401-20/ltc6401-26 1.3ghz low noise, low distortion differential adc drivers C74dbc im3 at 140mhz 2v p-p composite, i s = 50ma, a v = 8db, 14db, 20db, 26db lt6402-6/lt6402-12/ lt6402-20 300mhz differential amplifier/adc drivers C71dbc im3 at 20mhz 2v p-p composite, a v = 6db, 12db, 20db ltc6410-6 1.4ghz differential if amplifier with configurable input impedance oip3 = 36dbm at 70mhz, flexible interface to mixer if port ltc6416 2ghz, 16-bit differential adc buffer C72dbc im2 at 300mhz 2v p-p composite, i s = 42ma, en = 2.8nv/hz, a v = 0db, 300mhz } 0.1db bandwidth ltc6420-20 dual 1.8ghz low noise, low distortion differential adc drivers dual version of the ltc6400-20, a v = 20db variable gain if amplifiers/adc drivers lt6412 800mhz, 31db range analog-controlled vga oip3 = 35dbm at 240mhz, continuously adjustable gain control baseband differential amplifiers ltc6409 1.1nv/hz single supply differential amplifier/adc driver 88db sfdr at 100mhz, ac- or dc-coupled inputs ltc6406 3ghz rail-to-rail input differential amplifier/ adc driver C65dbc im3 at 50mhz 2v p-p composite, rail-to-rail inputs, en = 1.6nv/hz, 18ma ltc6404-1/ltc6404-2 low noise rail-to-rail output differential amplifier/ adc driver 16-bit snr, sfdr at 10mhz, rail-to-rail outputs, en = 1.5nv/hz, ltc6404-1 is unity-gain stable, ltc6404-2 is gain-of- tw o stable ltc6403-1 low noise rail-to-rail output differential amplifier/ adc driver 16-bit snr, sfdr at 3mhz, rail-to-rail outputs, en = 2.8nv/hz high speed adcs ltc2208/ltc2209 16-bit, 13msps/160msps adc 74dbfs noise floor, sfdr > 89db at 140mhz, 2.25v p-p input ltc2259-16 16-bit, 80msps adc, ultralow power 72dbfs noise floor, sfdr > 82db at 140mhz, 2.00v p-p input ltc2160-14/LTC2161-14/ ltc2162-14 14-bit, 25msps/40msps/60msps adc low power 76.2 dbfs noise floor, sfdr > 84db at 140mhz, 2.00v p-p input ltc2155-14/ltc2156-14/ ltc2157-14/ltc2158-14 14-bit, 170msps/210msps/250msps/310msps adc 2-channel 69dbfs noise floor, sfdr > 80db at 140mhz, 1.50v p-p input, >1ghz input bw ltc2216 16-bit, 80msps adc 79dbfs noise floor, sfdr > 91db at 140mhz, 75v p-p input wideband balanced amplifier 643015 ta05 v in ltc6430-15 r source = 100 differential r s 50 r l 50 v cc = 5v 5v r f 1:2 transformer 2:1 transformer r load = 100 differential


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